Various communication protocols such as IEEE 802.3, also known as Ethernet, use serial communication protocols. These protocols may use electrical signaling for the entire path, or combination of electrical and optical signaling for different parts of the path. Most of the high speed protocols use an embedded clock in the data stream. Clock and data recovery (CDR) circuits are used to recover the data at the destination. Various communications protocols such as Ethernet PON (IEEE 802.3ah and IEEE 802.3av) perform switching of signals from different sources such that at the receiver, the data stream from each source may have a different phase and/or a different frequency. Optical switched signals such as Passive Optical Networks (PON) have multiple sources sharing a data channel on a time division multiplexed (TDM) basis. TDM time slots are often referred to as frames. Each of the sources can be unique and may have a unique phase, a unique frequency offset, and the phase and/or frequency may be unknown to the receiver. Reacquisition of phase, and potentially frequency, is performed at the beginning of each frame. For these types of systems it is desirable to have rapid phase and frequency acquisition in the receiver to make maximum use of the time and bandwidth of the switched channel. Two steps may be required, the determination of when bit level phase acquisition can be started, often referred to as frame synchronization, and the actual bit level frequency and/or phase acquisition, often referred to as clock and data recovery (CDR). Uncertainty in (1) when to start the phase acquisition and (2) the time it takes to complete phase acquisition are wasted time on the channel.